Modern communications systems employ error correcting codes for robustness against fading, noise and interference. The error correcting codes are generally designed to support different code rates to meet different requirements of a variety of payload sizes and propagation channel conditions. For example, under poor channel conditions a lower code rate may be used with a large number of redundant bits in the coded output and under better channel conditions a higher code rate may be used with fewer redundant bits in the coded output.
Error correcting techniques can be grouped into two broad categories: Forward Error Correction (FEC) and Automatic Repeat Request (ARQ). Both methods may also use Cyclic Redundancy Check (CRC) for error detection. In case of FEC, redundant bits are added such that the receiver may be able to detect and possibly correct errors based on the received data. In case of ARQ, the receiver may be able to detect and possibly correct the errors. In case of ARQ, if the CRC fails even after possible error correction, a retransmission may be requested from the receiver to the transmitter. In case of retransmission, the transmitting side may send a different version of the encoded output for the same input block of data. The different encoded versions of the same input block of data may be identified by a Redundancy Version (RV). In both the FEC and ARQ methods, error correction is possible. The term FEC is used herein to refer to any error correcting code being used in a communication system.
Often the baseline error correcting code may be the same and the different code rates may be achieved by performing puncturing or repetition operation on the encoded bits. Sometimes the baseline code is known as the “Mother Code” since other code rates may be derived from this code rate. The puncturing and/or repetition operations are often collectively referred to as “Rate Matching” function. For example, as shown in FIG. 1, for each input bit, the FEC Mother Code Encoder 103 may output three bits with the baseline code rate of 1/3. The actual code rate for a transmitted block of bits may be different. For example, by puncturing some of the bits from the encoded output, higher code rates 2/3, 3/4, 5/6, etc. may be achieved. The bits that are generated by the Mother Code but are removed by the Rate Matching function are referred as punctured bits. Note that the Rate Matching can perform repetition or puncturing. In case of repetition, some or all of the encoded bits may be repeated to achieve lower code rates such as 1/4, 1/5, 2/7, etc.
In some propagation channels the bit errors may occur in bursts. For example, in case of mobile wireless communication, fading may cause loss of a burst of data. Many of the commonly used error correcting codes perform well when operating on received bits with errors in random positions. In order to improve the performance of the error correcting codes in the presence of burst errors, interleavers are often used to randomize the burst errors. FIG. 1 shows the use of interleavers 104, 106, and 108 in the encoding process. The interleaving function may be performed over the entire set of output bits or it may be performed individually on the different groups of output bits as illustrated in FIG. 1. In this case the interleavers 104, 106, and 108 may be referred to as Sub-block interleavers. The output of the interleavers is provided to the Rate Matching unit 110 which performs the puncturing or repetition function.
At the receiver the decoding may be performed using the received channel bits often referred to as soft bits or Log Likelihood Ratios (LLRs) which indicate whether a bit is 1 or 0 with additional information about its reliability. To enable a common decoder unit, regardless of the actual code rate used for transmission, a decoder may be designed for the Mother Code rate as shown in FIG. 2. To enable this capability, the demodulated soft bits, i.e., LLRs, are input to the Rate Matching unit 202 in FIG. 2. The Rate Matching unit at the receiver performs the reverse operation of the Rate Matching unit at the transmitter. In case of puncturing, the Rate Matching unit 202 may need to insert zeros for the bit positions for which there are no received LLRs from the transmitter side. The Rate Matching may initialize the input buffer for the FEC decoder to zeros for the bit positions corresponding to bits that are not transmitted by the sender of the data.
The initialization of the LLR input buffer for the FEC decoder to zero for bit positions for which there is no transmission from the sender may be complicated by the presence of Deinterleavers 204, 206 and 208 that may be used in many digital communication systems. The bit positions that are punctured may not be contiguous or easily separable after deinterleaving. The deinterleaving operation is the reverse of the interleaving operation. The deinterleaving function may be performed individually on the different group of bits output as illustrated in FIG. 2 if Sub-block interleaving is used at the transmitter side. In this case the deinterleavers 204, 206, and 208 may be referred to as Sub-block deinterleavers.
For a high throughput system, it may not be efficient to initialize the LLRs for punctured bit positions to zero before starting the FEC decoding operation.